Georgios Vavouliotis
Senior Researcher · Huawei Research Center Switzerland
My name is Georgios (Yorgos) Vavouliotis and I am a Senior Researcher at Huawei Research Center in Zurich. I received my Ph.D. from Universitat Politècnica de Catalunya and Barcelona Supercomputing Center. I also hold a diploma on Electrical and Computer Engineering from the National Technical University of Athens.
My research explores the frontiers of computer architecture and pioneers innovative microarchitectural solutions that address critical computational challenges. I explore advanced techniques for reducing address translation overheads, enhancing cache prefetching performance, and developing smart cache/memory management strategies for complex computing environments and diverse application types. By leveraging AI/ML techniques, I also build intelligent and adaptive components while re-thinking microarchitectural designs for emerging application domains.
My research work has received accolades, including Best Paper and Best Poster awards, and has been mainly featured in top-tier computer architecture conferences, including ISCA, HPCA, MICRO, and ASPLOS.
News
Publications
Hardware TLB prefetching can reduce the address translation overheads posed by applications with large data and code footprints, while exploiting address translation metadata available at the microarchitecture and runtime levels can improve the performance of cache prefetchers.